CesiumAstro  Salary

CesiumAstro
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Earnings on positions in CesiumAstro

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CesiumAstro is looking for employees for positions:

principal engineer

Working hours

  • full-time

Requirements

  • experience of FPGA development using VHDL, simulation, and top-level integration particularly using Xilinx design tools
  • good understanding of well-known Wireless Communications standards, in particular the DVB-S2 , DVB-RCS and CCSDS standards
  • understanding of digital and analogue hardware design with some hands-on laboratory experience of bringing-up and validating designs, utilising various lab equipment
  • knowledge of VITA-49.2 protocols
  • proven track record of on-time and high-quality project delivery
  • experience working in both start-up environments as well as larger technical organizations

Responsibility

  • the successful candidate will be versatile and proactive, a clear communicator and team player with good inter-personal and social skills
  • researching and designing of fast and efficient hardware realisable DSP algorithms to implement functions such as filters, equalisers, timing/carrier recovery loops, multi-rate structures & FFT processing engines
  • developing models to provide real-life stimulus for testing the developed algorithms, including phase and Gaussian noise, non-linear RF effects, Doppler, multipath, and other such channel impairments
  • they will be capable of generating accurate and concise documentation and design notes, and be able to disseminate critical information and interact with the design team